EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 62

IC ACCLAIM MCU 128KB 100LQFP

EZ80F92AZ020EG

Manufacturer Part Number
EZ80F92AZ020EG
Description
IC ACCLAIM MCU 128KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F92AZ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Processor Series
EZ80F92x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-3871
EZ80F92AZ020EG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F92AZ020EG
Manufacturer:
Zilog
Quantity:
10 000
eZ80F92/eZ80F93
Product Specification
55
T1
T2
T
T3
CLK
System Clock
ADDR[23:0]
DATA[7:0]
CSx
RD
WAIT
WR
MREQ
or IORQ
®
Figure 10. Example: Z80
Bus Mode Write Timing
Intel
Bus Mode
TM
Chip selects configured for Intel bus mode modify the CPU bus signals to duplicate a four-
state memory transfer similar to that found on Intel-style microcontrollers. The bus signals
and eZ80F92 device pins are mapped as displayed in
Figure 11
on page 56. In Intel bus
mode, you can select either multiplexed or nonmultiplexed address and data buses. In non-
multiplexed operation, the address and data buses are separate. In multiplexed operation,
the lower byte of the address, ADDR[7:0], also appears on the data bus, DATA[7:0], dur-
ing State T1 of the Intel bus mode cycle. During multiplexed operation, the lower byte of
the address bus also appears on the address bus in addition to the data bus.
PS015313-0508
Chip Selects and Wait States

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