EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 84

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
Programmable Reload Timer Operation
Setting Timer Duration
There are three factors to consider when determining Programmable Reload Timer dura-
tion—clock frequency, clock divider ratio, and initial count value. Minimum duration of
the timer is achieved by loading
0000h
0000h
The time-out period of the PRT is returned by the following equation:
To calculate the time-out period with the above equation when using an initial value of
0000h
Minimum time-out duration is 4 times longer than the input clock period and is generated
by setting the clock divider ratio to 1:4 and the reload value to
duration is 2
setting the clock divider ratio to 1:256 and the reload value to
Single Pass Mode
In SINGLE PASS mode, when the end-of-count value,
the timer is disabled, and the PRT_EN bit resets to 0. To restart the timer, the CPU must
re-enable the timer by setting the PRT_EN bit to 1 in the Timer Control Register. To set
the downcounter to the value in the reload registers, the RST_EN bit must be set to 1 in the
Timer Control Register. An example of a PRT operating in SINGLE PASS mode is
displayed in
78.
PRT Time-Out Period
, because the timer first rolls over to
.
, enter a reload value of 65536 (
24
Figure 21
(16,777,216) times longer than the input clock period and is generated by
on page 78. Timer register information is listed in
=
Clock Divider Ratio x Reload Value
System Clock Frequency
0001h
FFFFh
. Maximum duration is achieved by loading
FFFFh
+ 1).
and then continues counting down to
0000h
0001h
0000h
, is reached, counting halts,
Programmable Reload Timers
Product Specification
. Maximum time-out
.
eZ80F92/eZ80F93
Table 29
on page
77