EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 108

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZA50EG

Manufacturer Part Number
EZ80F91AZA50EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet

Specifications of EZ80F91AZA50EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4563

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZA50EG
Manufacturer:
Zilog
Quantity:
10 000
PS027001-0707
autoincrement of the Flash address stored in the Flash Address registers (FLASH_PAGE,
FLASH_ROW, FLASH_COL).
A typical sequence that performs a single-byte I/O Write is shown below. Because the
Write is self-timed,
ing or interrupts.
1. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
2. Write the data value to the FLASH_DATA register.
Multibyte I/O Write (Row Programming)
Multibyte I/O Write operations use the same I/O registers as single-byte Writes.
Multibyte I/O Writes allow the programming of full row and are enabled by setting the
ROW_PGM bit of the Flash Program Control Register. For multibyte I/O Writes, the CPU
sets the address registers, enables row programming, and then executes an I/O instruction
(with repeat) to load the block of data into the FLASH_DATA register. For each individual
byte written to the FLASH_DATA register during the block move, the Flash controller
asserts the internal WAIT signal to stall the CPU until the current byte is programmed.
Each access to the FLASH_DATA register causes an autoincrement of the Flash address
stored in the Flash Address registers (FLASH_PAGE, FLASH_ROW, FLASH_COL).
During row programming, the Flash controller continuously asserts the Flash memory’s
high voltage signal until all bytes are programmed (column address < 255). As a result, the
row programs more quickly than if the high-voltage signal is toggled for each byte. The
per-byte programming time during row programming is between 41 µs and 52 µs. As such,
programming 256 bytes of a row in this mode takes not more than 13.4 ms, leaving 17.6
A typical sequence that performs a multibyte I/O Write is shown below:
1. Check the FLASH_IRQ register to ensure that any previous row program is
2. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
3. Set the ROW_PGM bit in the FLASH_PGCTL register to enable row programming
4. Write the next data value to the FLASH_DATA register.
5. If the end of the row has not been reached, return to
During row programming, software must monitor the row time-out error bit either by
enabling this interrupt or via polling. If a row time-out occurs, the Flash controller aborts
the row programming operation, and software must assure that no further Writes are
performed to the row without it first being erased. It is suggested that row programming is
be used one time per row and not in combination with single-byte Writes to the same row
ms for CPU instruction overhead to fetch the 256 bytes.
address of the byte to be written.
completed.
address of the first byte to be written.
mode.
step 2
of the sequence is repeated back-to-back without requiring poll-
step
4.
Product Specification
eZ80F91 ASSP
Flash Memory
100

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