EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 121

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZA50EG

Manufacturer Part Number
EZ80F91AZA50EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet

Specifications of EZ80F91AZA50EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4563

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZA50EG
Manufacturer:
Zilog
Quantity:
10 000
PS027001-0707
Table 46. Flash Program Control Register
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only.
Bit
Position
[7:3]
[2]
ROW_PGM
[1]
PG_ERASE
[0]
MASS_ERASE
Value Description
00h
0
1
0
1
0
1
Reserved.
Row Program Disable or Row Program completed.
Row Program Enable. This bit automatically resets to 0 when
the row address reaches 256 or when the Row Program
operation times out.
Page Erase Disable (Page Erase completed).
Page Erase Enable. This bit automatically resets to 0 when the
PAGE ERASE operation is complete.
Mass Erase Disable (Mass Erase completed).
Mass Erase Enable. This bit automatically resets to 0 when the
MASS ERASE operation is complete.
R
7
0
R
6
0
R
5
0
(FLASH_PGCTL = 00FFh)
R
4
0
R
3
0
Product Specification
R/W
2
0
eZ80F91 ASSP
R/W
1
0
Flash Memory
R/W
0
0
113

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