EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 262

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZA50EG

Manufacturer Part Number
EZ80F91AZA50EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet

Specifications of EZ80F91AZA50EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4563

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZA50EG
Manufacturer:
Zilog
Quantity:
10 000
Table 141. Instruction Store 4:0 Registers
ZDI_IS1 = 24h, and ZDI_IS0 = 25h in the ZDI Register Write Only Address Space)
PS027001-0707
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Bit
Position
[7:0]
zdi_is4,
zdi_is3,
zdi_is2,
zdi_is1,
or
zdi_is0
Note:
The Instruction Store 0 register is located at a higher ZDI address than the other Instruc-
tion Store registers. This feature allows the use of the ZDI auto-address increment function
to load and execute a multibyte instruction with a single data stream from the ZDI master.
Execution of the instruction commences with writing the final byte to ZDI_IS0.
ZDI Write Memory Register
A Write to the ZDI Write Memory register causes the eZ80F91 device to write the 8-bit
data to the memory location specified by the current address in the Program Counter. In
Z80 MEMORY mode, this address is {MBASE, PC[15:0]}. In ADL MEMORY mode,
this address is PC[23:0]. The Program Counter, PC, increments after each data Write.
However, the ZDI register address does not increment automatically when this register
is accessed. As a result, the ZDI master is allowed to write any number of data bytes by
writing to this address one time followed by any number of data bytes. See
on page 255.
Value
00h–FFh These registers contain the Op Codes and operands for
W
X
7
Description
immediate execution by the CPU following a Write to
ZDI_IS0. The ZDI_IS0 register contains the first Op Code
of the instruction. The remaining ZDI_ISx registers
contain any additional Op Codes or operand dates
required for execution of the required instruction.
W
X
6
W
X
5
(ZDI_IS4 = 21h, ZDI_IS3 = 22h, ZDI_IS2 = 23h,
W
X
4
W
X
3
W
X
2
W
X
1
Product Specification
W
X
0
Zilog Debug Interface
eZ80F91 ASSP
Table 142
254

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