EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 28

IC ACCLAIM MCU 256KB 144LQFP

EZ80F91AZA50EG

Manufacturer Part Number
EZ80F91AZA50EG
Description
IC ACCLAIM MCU 256KB 144LQFP
Manufacturer
Zilog
Series
eZ80® AcclaimPlus!™r
Datasheet

Specifications of EZ80F91AZA50EG

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, IrDA, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-4563

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91AZA50EG
Manufacturer:
Zilog
Quantity:
10 000
PS027001-0707
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
114
115
116
A10
B10
E8
BGA
Pin No Symbol
PA0
PWM0
OC0
PA1
PWM1
OC1
PA2
PWM2
OC2
Function
GPIO Port A
GPIO Port A
GPIO Port A
PWM
Output 0
Output
Compare 0
PWM
Output 1
Output
Compare 1
PWM
Output 2
Output
Compare 2
Signal Direction Description
Bidirectional
Output
Output
Bidirectional
Output
Output
Bidirectional
Output
Output
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
0. This signal is multiplexed with
PA0.
This pin is used by Timer 3 for
Output Compare 0. This signal is
multiplexed with PA0.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
1. This signal is multiplexed with
PA1.
This pin is used by Timer 3 for
Output Compare 1. This signal is
multiplexed with PA1.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
2. This signal is multiplexed with
PA2.
This pin is used by Timer 3 for
Output Compare 2. This signal is
multiplexed with PA2.
Product Specification
Architectural Overview
eZ80F91 ASSP
20

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