EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 360

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

Table 239. External Memory Write Timing
PS027001-0707
Parameter
T
T
T
T
T
T
T
T
T
T
*At the conclusion of a Write cycle, deassertion of WR always occurs before any change to
ADDR, DATA, CSx, or MREQ.
1
2
3
4
5
6
7
8
9
10
Abbreviation
PHI Clock Rise to ADDR Valid Delay
PHI Clock Rise to ADDR Hold Time
PHI Clock Fall to DATA Valid
PHI Clock Rise to DATA Hold Time
PHI Clock Rise to CSx Assertion Delay
PHI Clock Rise to CSx Deassertion Delay
PHI Clock Rise to MREQ Assertion Delay
PHI Clock Rise to MREQ Deassertion Delay
PHI Clock Fall to WR Assertion Delay
PHI Clock Rise to WR Deassertion Delay*
WR Deassertion to ADDR Hold Time
WR Deassertion to DATA Hold Time
WR Deassertion to CSx Hold Time
WR Deassertion to MREQ Hold Time
Minimum
1.0
2.3
0.0
2.3
2.3
0.0
0.4
0.5
1.2
0.5
—
—
—
1
Delay (ns)
Maximum
10.8
8.5
2.5
6.0
7.0
6.5
1.0
5.0
—
—
—
—
—
—
Product Specification
Electrical Characteristics
eZ80F91 ASSP
352