EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 377

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

GPIO Overview 49
GPIO port pins 41, 49, 55, 358
H
HALT 10, 257, 281
HALT instruction 45
HALT Mode 45
HALT mode 1, 46, 249, 257
HALT, Op-Code Map 284
HALT_SLP 10, 257, 264
Handshake 218
handshake 175, 177
hash table 315
I
I/O Chip Select Operation 68
I/O Chip Selects, External 27
I/O Read 99
I/O space 6, 8, 65, 68
I2C Acknowledge bit 228
I2C bus 213, 216, 217
I2C bus clock 213
I2C bus protocol 214
I2C Clock Control Register 232
I2C control bit 219, 220, 222
I2C Control Register 227
I2C Data Register 227
I2C Extended Slave Address Register 226
I2C Registers 225
I2C Software Reset Register 233
I2C Status Register 230
IC0 17, 127, 129, 134, 135, 139, 140, 141, 142,
152, 156
IC1 17, 127, 129, 134, 135, 139, 141, 152, 156
IC2 18, 127, 129, 134, 135, 139, 140, 141, 152,
156
IC3 18, 127, 129, 134, 135, 139, 141, 142, 152,
156
IEEE 1149.1 specification 263, 268
IEEE 802.3 315
IEEE 802.3 frames 304
IEEE 802.3 specification 305, 306
PS027001-0707
IEEE 802.3, 802.3(u) minimum values 310
IEEE 802.3/4.2.3.2.1 Carrier Deference 311, 312
IEEE Standard 1149.1 261, 262
IEF1 59, 125, 257
IEF2 59
IFLG bit 213, 218, 221, 223, 224, 225, 228, 231
IM 0, Op Code Map 287
IM 1, Op Code Map 287
IM 2, Op Code Map 287
Information Page Characteristics 102
Infrared Encoder/Decoder 197
Infrared Encoder/Decoder Register 201
Infrared Encoder/Decoder Signal Pins 200
Input Capture 128
INPUT capture mode 130
Input capture mode 128
input capture mode 127, 134
INSTRD 9
Instruction Store 4
Intel- 70
Intel Bus Mode 73
Intel Bus Mode (Separate Address and Data Buses)
74
internal pull-up 51
Internal RC oscillator 115
internal RC oscillator 118
internal system clock 69
Interpacket Gap 310, 311
Interpacket gap 309
interpacket gap 300, 312
Interrupt Controller 57
interrupt enable 9
Interrupt Enable bit 227
interrupt enable bit 160, 178
Interrupt Enable Flag 257
interrupt enable flag 125
Interrupt Input 200
interrupt input 11, 12, 13, 14, 15, 16
Interrupt Priority 61, 63
interrupt priority 63
interrupt priority levels 60
Interrupt Priority Registers 60
Interrupt request 133, 134
0 Registers 253
Product Specification
eZ80F91 ASSP
369