EZ80F91AZA50EG Zilog, EZ80F91AZA50EG Datasheet - Page 383

• Manufacturer Part Number: EZ80F91AZA50EG
• Description: IC ACCLAIM MCU 256KB 144LQFP
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91AZA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4563

204, 206
Serial Peripheral Interface flag 211, 212
Serial Peripheral Interface Functional Description
206
Setting Timer Duration 122
Single Pass Mode 123
single pass mode 121, 124, 132
Single-Byte I/O Write 99
SLA 220, 222, 226, 283
SLA, Op Code Map 289, 290
SLA, Op Code map 285
SLAVE mode 213, 227, 231
slave mode 224, 225, 226
SLAVE mode, SPI 206
Slave Receive 213, 224
Slave Select 204
Slave Transmit 213, 223
Slave Transmit mode 228
slave transmit mode 223, 224
SLEEP Mode 45
SLEEP mode 173, 249, 257
sleep-mode recovery 173
sleep-mode recovery reset 174
Software break point instruction 261
Specialty Timer Modes 126
SPI Baud Rate Generator 207
SPI Baud Rate Generator Registers—Low Byte and
High Byte 208
SPI Control Register 210
SPI Data Rate 207
SPI Flag 206
SPI interrupt service routine 58
SPI Master device 208
SPI master device 19
SPI MASTER mode 206
SPI mode 17
SPI Receive Buffer Register 212
SPI Registers 208
SPI serial bus 211
SPI Serial Clock 18
SPI Signals 204
SPI slave device 19
SPI SLAVE mode 206
SPI Status Register 207, 211
PS027001-0707
SPI Transmit Shift Register 207, 208, 211
SPIF status bit—see Serial Peripheral Interface flag
211
SPIF—see Serial Peripheral Interface flag 206,
211
SRA 283
SRA, Op Code Map 285, 289
SRAM 1, 104, 235, 333, 363
SRAM, internal Ethernet 296
SS—see Slave Select 17, 204, 205, 206, 208,
210
STA 227
standard mode 213
Standard VHDL Package STD_1149_1_2001 264
START and STOP Conditions 214
START condition 214, 217, 218, 221, 223, 224,
225, 227, 229, 230, 231, 232
start condition 215
Start Condition, ZDI 237
Starting Program Counter 59, 60
STOP condition 214, 215, 217, 221, 223, 224,
228, 229, 231, 232
Supply Voltage 344
supply voltage 2, 42, 51, 213, 271, 343
Switching Between Bus Modes 84
System clock 47, 48, 115
system clock 41, 45, 51, 54, 118, 125, 127, 132,
150, 181, 207, 232, 233, 242, 262, 270, 293,
358
system clock cycle 75, 78, 122
System Clock Cycle Time 348
system clock cycles 9, 68, 71, 72, 75, 78, 82,
116, 262
System clock divider 132
System Clock Fall Time 349
System Clock Frequency 122, 181, 207
system clock frequency 99, 101, 105, 106, 236
System Clock High Time 348
system clock jitter 127
System Clock Low Time 348
System Clock Oscillator Input 14
System Clock Oscillator Output 13
system clock period 262
system clock periods 151
Product Specification
eZ80F91 ASSP
375