MC9S08AC16CFJE Freescale Semiconductor, MC9S08AC16CFJE Datasheet - Page 252

IC MCU 8BIT 16K FLASH 32-LQFP

MC9S08AC16CFJE

Manufacturer Part Number
MC9S08AC16CFJE
Description
IC MCU 8BIT 16K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08AC16CFJE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (S08ADC10V1)
14.4.3
ADC1RH contains the upper two bits of the result of a 10-bit conversion. When configured for 8-bit
conversions both ADR8 and ADR9 are equal to zero. ADC1RH is updated each time a conversion
completes except when automatic compare is enabled and the compare condition is not met. In 10-bit
MODE, reading ADC1RH prevents the ADC from transferring subsequent conversion results into the
result registers until ADC1RL is read. If ADC1RL is not read until after the next conversion is completed,
then the intermediate conversion result will be lost. In 8-bit mode there is no interlocking with ADC1RL.
In the case that the MODE bits are changed, any data in ADC1RH becomes invalid.
14.4.4
ADC1RL contains the lower eight bits of the result of a 10-bit conversion, and all eight bits of an 8-bit
conversion. This register is updated each time a conversion completes except when automatic compare is
enabled and the compare condition is not met. In 10-bit mode, reading ADC1RH prevents the ADC from
transferring subsequent conversion results into the result registers until ADC1RL is read. If ADC1RL is
not read until the after next conversion is completed, then the intermediate conversion results will be lost.
In 8-bit mode, there is no interlocking with ADC1RH. In the case that the MODE bits are changed, any
data in ADC1RL becomes invalid.
252
ACFGT
ACFE
Field
5
4
Reset:
W
R
Data Result High Register (ADC1RH)
Data Result Low Register (ADC1RL)
Compare Function Enable — ACFE is used to enable the compare function.
0 Compare function disabled
1 Compare function enabled
Compare Function Greater Than Enable — ACFGT is used to configure the compare function to trigger when
the result of the conversion of the input being monitored is greater than or equal to the compare value. The
compare function defaults to triggering when the result of the compare of the input being monitored is less than
the compare value.
0 Compare triggers when input is less than compare level
1 Compare triggers when input is greater than or equal to compare level
7
0
0
Table 14-4. ADC1SC2 Register Field Descriptions (continued)
= Unimplemented or Reserved
Figure 14-6. Data Result High Register (ADC1RH)
0
0
6
MC9S08AC16 Series Data Sheet, Rev. 8
0
0
5
0
0
4
Description
0
0
3
0
0
2
ADR9
Freescale Semiconductor
0
1
ADR8
0
0

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