C8051F567-IQ Silicon Laboratories Inc, C8051F567-IQ Datasheet - Page 193
C8051F567-IQ
Manufacturer Part Number
C8051F567-IQ
Description
IC 8051 MCU 16K FLASH 32-QFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F56xr
Specifications of C8051F567-IQ
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
32-QFP
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F560DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1708
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F567-IQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F567-IQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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In all of these equations, the results must be rounded down to the nearest integer.
The following example shows the steps for calculating the baud rate values for a Master node running at
24 MHz and communicating at 19200 bits/sec. First, calculate the multiplier:
Next, calculate the prescaler:
Finally, calculate the divider:
These values lead to the following baud rate:
The following code programs the interface in Master mode, using the Enhanced Checksum and enables
the interface to operate at 19230 bits/sec using a 24 MHz system clock.
Table 20.2 includes the configuration values required for the typical system clocks and baud rates:
LIN0CF
LIN0CF
LIN0ADR
// Initialize the register (prescaler, multiplier and bit 8 of divider)
LIN0DAT
LIN0ADR
LIN0DAT
LIN0ADR
LIN0DAT
LIN0ADR
LIN0DAT
|= 0x40;
= 0x80;
= 0x0D;
= ( 0x01 << 6 ) + ( 0x00 << 1 ) + ( ( 0x138 & 0x0100 ) >> 8 );
|= 0x80;
= 0x0C;
= (unsigned char)_0x138;
= 0x0B;
= 0x08;
= 0x0C;
prescaler
divider
prescaler
divider
baud_rate
=
=
------------------------------------------------------------------------------------------------------------------------------------- -
2
=
multiplier
=
ln
prescaler
ln
---------------------------------------------------------------------- -
2
------------------------------------------------------------------------------------------------
-----------------------------------------------------------
multiplier
multiplier
1
0
=
+
+
--------------------------------------------------------------- -
2
1
1
1
24000000
24000000
=
+
+
1
20000
--------------- - 1
19200
1
19200
0
24000000
Rev. 1.1
+
=
+
SYSCLK
1
----------------------------- 1
baud_rate
// Activate the interface
// Set the node as a Master
// Point to the LIN0MUL register
// Point to the LIN0DIV register
// Initialize LIN0DIV
// Point to the LIN0SIZE register
// Initialize the checksum as Enhanced
// Point to LIN0CTRL register
// Reset any error and the interrupt
1
SYSCLK
0
multiplier
20000
–
+
baud_rate
200
1
19200
=
0.0417
312
------- - 1
ln2
–
C8051F55x/56x/57x
+
1
=
1
312.5
–
19230.77
0
200
baud_rate
=
1.644
312
------- - 1
ln2
1
–
1
193
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