C8051F320-GQ Silicon Laboratories Inc, C8051F320-GQ Datasheet - Page 224

IC 8051 MCU 16K FLASH 32LQFP

C8051F320-GQ

Manufacturer Part Number
C8051F320-GQ
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F320-GQ

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 17-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1448 - ADAPTER PROGRAM TOOLSTICK F320336-1260 - DEV KIT FOR C8051F320/F321
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1259

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C8051F320/1
19.3.3. USB Start-of-Frame Capture
When T3SOF = ‘1’, Timer 3 operates in USB Start-of-Frame (SOF) capture mode. When T3SPLIT = ‘0’,
Timer 3 counts up and overflows from 0xFFFF to 0x0000. Each time a USB SOF is received, the contents
of the Timer 3 registers (TMR3H:TMR3L) are latched into the Timer 3 Reload registers
(TMR3RLH:TMR3RLL). A Timer 3 interrupt is generated if enabled. This mode can be used to calibrate the
system clock or external oscillator against the known USB host SOF clock.
When T3SPLIT = ‘1’, the Timer 3 registers (TMR3H and TMR3L) act as two 8-bit counters. Each counter
counts up independently and overflows from 0xFF to 0x00. Each time a USB SOF is received, the contents
of the Timer 3 registers are latched into the Timer 3 Reload registers (TMR3RLH and TMR3RLL). A
Timer 3 interrupt is generated if enabled.
224
External Clock / 8
SYSCLK / 12
External Clock / 8
T
F
3
H
T
F
3
L
TMR3CN
Figure 19.10. Timer 3 SOF Capture Mode (T3SPLIT = ‘0’)
Figure 19.11. Timer 3 SOF Capture Mode (T3SPLIT = ‘1’)
E
N
T
F
3
L
SYSCLK / 12
O
T
3
S
F
SYSCLK
T
3
S
P
L
T
I
T
R
3
H
T
F
3
T
F
3
L
X
C
K
T
3
L
0
1
TMR3CN
N
T
F
3
L
E
O
T
3
S
F
T
S
P
T
3
L
I
T
R
SYSCLK
3
C
T
3
X
L
K
0
1
Start-of-Frame
M
H
T
3
0
1
1
0
M
T
3
L
0
1
(SOF)
USB
CKCON
M
T
2
H
M
H
T
3
M
T
2
L
M
T
3
L
M
T
1
CKCON
M
T
2
H
M
T
0
M
T
2
L
C
TR3
S
A
1
TR3
M
T
1
S
C
A
0
M
T
0
Rev. 1.4
S
C
A
1
S
C
A
0
Enable
TCLK
TCLK
Capture
TCLK
TMR3RLH
TMR3RLL
TMR3H
TMR3L
TMR3RLL TMR3RLH
TMR3L
Interrupt
Capture
Capture
TMR3H
To ADC
Start-of-Frame
(SOF)
Enable
USB
To ADC
Interrupt

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