COP8SAA716M8/NOPB National Semiconductor, COP8SAA716M8/NOPB Datasheet - Page 22

• Manufacturer Part Number: COP8SAA716M8/NOPB
• Description: IC MCU OTP 8BIT 1K 16-SOIC
• Manufacturer: National Semiconductor
• Series: COP8™ 8SAr

Specifications of COP8SAA716M8/NOPB

• Core Processor: COP8
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: Microwire/Plus (SPI)
• Peripherals: POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Package: 16SOIC W
• Family Name: COP8
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Interface Type: SPI
• Number Of Timers: 1
• Maximum Clock Frequency: 10 MHz
• Data Ram Size: 64 B
• Number Of Programmable I/os: 16
• Height: 2.3 mm
• Length: 10.5 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: *COP8SAA716M8; *COP8SAA716M8/NOPB; COP8SAA716M8

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7.0 Timers
7.2.3 Mode 3. Input Capture Mode
The device can precisely measure external frequencies or
time external events by placing the timer block, T1, in the
input capture mode. In this mode, the reload registers serve
as independent capture registers, capturing the contents of
the timer when an external event occurs (transition on the
timer input pin). The capture registers can be read while
maintaining count, a feature that lets the user measure
elapsed time and time between events. By saving the timer
value when the external event occurs, the time of the exter-
nal event is recorded. Most microcontrollers have a latency
time because they cannot determine the timer value when
the external event occurs. The capture register eliminates
the latency time, thereby allowing the applications program
to retrieve the timer value stored in the capture register.
In this mode, the timer T1 is constantly running at the fixed t
rate. The two registers, R1A and R1B, act as capture regis-
ters. Each register acts in conjunction with a pin. The register
R1A acts in conjunction with the T1A pin and the register
R1B acts in conjunction with the T1B pin.
The timer value gets copied over into the register when a
trigger event occurs on its corresponding pin. Control bits,
T1C3, T1C2 and T1C1, allow the trigger events to be speci-
(Continued)
FIGURE 17. Timer in Input Capture Mode
C
22
fied either as a positive or a negative edge. The trigger
condition for each input pin can be specified independently.
The trigger conditions can also be programmed to generate
interrupts. The occurrence of the specified trigger condition
on the T1A and T1B pins will be respectively latched into the
pending flags, T1PNDA and T1PNDB. The control flag
T1ENA allows the interrupt on T1A to be either enabled or
disabled. Setting the T1ENA flag enables interrupts to be
generated when the selected trigger condition occurs on the
T1A pin. Similarly, the flag T1ENB controls the interrupts
from the T1B pin.
Underflows from the timer can also be programmed to gen-
erate interrupts. Underflows are latched into the timer T1C0
pending flag (the T1C0 control bit serves as the timer under-
flow interrupt pending flag in the Input Capture mode). Con-
sequently, the T1C0 control bit should be reset when enter-
ing the Input Capture mode. The timer underflow interrupt is
enabled with the T1ENA control flag. When a T1A interrupt
occurs in the Input Capture mode, the user must check both
the T1PNDA and T1C0 pending flags in order to determine
whether a T1A input capture or a timer underflow (or both)
caused the interrupt.
Figure 17 shows a block diagram of the timer in Input Cap-
ture mode.
DS012838-24