R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 301
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.126 TRECR1 Register in Output Compare Mode
Figure 14.127 TRECR2 Register in Output Compare Mode
Timer RE Control Register 1
Timer RE Control Register 2
b7 b6 b5 b4
b7 b6 b5 b4
0 0
Feb 29, 2008
0
b3 b2
b3 b2
0
0 0
b1 b0
b1 b0
0 0
Bit Symbol
Bit Symbol
H12_H24
TSTART
TRECR1
TRERST
TRECR2
TOENA
(b7-b6)
Symbol
Symbol
TCSTF
COMIE
DYIE
WKIE
SEIE
MNIE
HRIE
(b0)
INT
PM
Page 282 of 485
—
—
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Timer RE count status flag
TREO pin output enable bit
Interrupt request timing bit
Timer RE reset bit
A.m./p.m. bit
Operating mode select bit
Timer RE count start bit
Periodic interrupt triggered every
second enable bit
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
hour enable bit
Periodic interrupt triggered every
day enable bit
Periodic interrupt triggered every
w eek enable bit
Compare match interrupt enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
011Ch
Address
Bit Name
011Dh
0 : Count stopped
1 : Counting
0 : Disable clock output
1 : Enable clock output
Set to 0 in output compare mode.
When setting this bit to 0, after setting it to 1, the
follow ing w ill occur.
• Registers TRESEC, TREMIN, TREHR, TREWK,
• Bits TCSTF, INT, PM, H12_H24, and TSTART
• The 8-bit counter is set to 00h and
Set to 0 in output compare mode.
0 : Count stops
1 : Count starts
and TRECR2 are set to 00h.
in the TRECR1 register are set to 0.
the 4-bit counter is set to 0h.
Set to 0 in output compare mode.
0 : Disable compare match interrupt
1 : Enable compare match interrupt
After Reset
Function
After Reset
00h
Function
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
—
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