R5F21276SNFP#U0 Renesas Electronics America, R5F21276SNFP#U0 Datasheet - Page 91
R5F21276SNFP#U0
Manufacturer Part Number
R5F21276SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Specifications of R5F21276SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Table 7.30
X: 0 or 1
NOTES:
Table 7.31
X: 0 or 1
NOTES:
Register
Register
Setting
Setting
1. Pulled up by setting the PU07 bit in the PUR0 register to 1.
2. Set the INT1SEL bit in the PMR register to 1 (P3_6).
3. Set bits UART1SEL1 and UART1SEL0 in the PINSR1 register to 10b.
4. N-channel open drain output by setting the NCH bit in the U1C0 register to 1.
1. Pulled up by setting the PU07 bit in the PUR0 register to 1.
2. Set the SSISEL bit in the PMR register to 0 (P3_3).
3. N-channel open drain output by setting the SOOS bit in the SSMR2 register to 1 (N-channel open drain output).
4. N-channel open drain output by setting the NCH bit in the U1C0 register to 1.
value
value
Bit
Bit
Sep 26, 2008
PD3_7
PD3
PD3_6
0
1
X
0
X
X
X
PD3
Port P3_6/(TXD1)/(RXD1)/(INT1)
Port P3_7/TRAO/SSO/RXD1/(TXD1)
X
0
1
0
0
IICSEL SSO output control
PMR
X
X
X
X
X
0
0
TXD1EN
Page 72 of 453
PMR
X
X
X
0
0
0
1
0
Communication Modes and I/O Pins.)
Clock Synchronous Serial I/O with Chip
Select (Refer to Table 16.4
Association between
0
0
0
0
0
1
0
SMD2
X
X
X
X
0
0
0
0
1
1
1
SSO input control
U1MR
SMD1
X
0
X
0
X
0
0
0
0
1
X
0
0
0
0
0
0
1
SMD0
X
0
X
0
X
0
1
0
1
0
X
TRAMR
TOENA
X
X
X
0
0
0
1
INT1EN
INTEN
0
0
0
0
1
1
0
0
0
0
0
Other than TXD1, RXD1
Other than TXD1, RXD1
Refer to Table 7.32 Port
Refer to Table 7.32 Port
Other than TXD1, RXD1
Other than TXD1, RXD1
Other than TXD1, RXD1
P3_7 UART1 Setting
P3_7 UART1 Setting
usage conditions
usage conditions
usage conditions
usage conditions
usage conditions
UART1 setting
Condition
Condition
Input port
Output port
INT1 input
TXD1 output
RXD1 input
−
7. Programmable I/O Ports
(1)
(1, 2)
(1)
(3, 4)
Function
Input port
Output port
TXD1 output
RXD1 input
TRAO output
SSO output
SSO input
Function
(1)
(2)
(1)
(2)
(3)
(4)
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