R5F21272SDFP#U0 Renesas Electronics America, R5F21272SDFP#U0 Datasheet - Page 269

IC R8C/27 MCU FLASH 32LQFP

R5F21272SDFP#U0

Manufacturer Part Number
R5F21272SDFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheet

Specifications of R5F21272SDFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Quantity
Price
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Part Number:
R5F21272SDFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Part Number:
R5F21272SDFP#U0R5F21272SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R5F21272SDFP#U0R5F21272SDFP#X6
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 15.8
• Example of transmit timing (when internal clock is selected)
• Example of receive timing (when external clock is selected)
The above applies under the following settings:
The following conditions are met when “H” is applied to the CLKi pin before receiving data:
fEXT: Frequency of external clock
i = 0 or 1
The above applies under the following settings:
TE bit in UiC1
register
TI bit in UiC1
register
CLKi
TXDi
TXEPT bit in
UiC0 register
IR bit in SiTIC
register
RE bit in UiC1
register
TE bit in UiC1
register
TI bit in UiC1
register
CLKi
RXDi
RI bit in UiC1
register
IR bit in SiRIC
register
• CKDIR bit in UiMR register = 1 (external clock)
• CKPOL bit in UiC0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
• TE bit in UiC1 register = 1 (enables transmit)
• RE bit in UiC1 register = 1 (enables receive)
• Write dummy data to the UiTB register
• CKDIR bit in UiMR register = 0 (internal clock)
• CKPOL bit in UiC0 register = 0 (output transmit data at the falling edge and input receive data at the rising edge of the transfer clock)
• UiIRS bit in UiC1 register = 0 (an interrupt request is generated when the transmit buffer is empty)
Transfer clock
Sep 26, 2008
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Transmit and Receive Timing Example in Clock Synchronous Serial I/O Mode
Set data in UiTB register
Write dummy data to UiTB register
Transfer from UiTB register to UARTi transmit register
Transfer from UiTB register to UARTi transmit register
D0
D0
Transfer from UARTi receive register to
D1
D1
Page 250 of 453
D2
D2
TCLK
D3
D3
1/fEXT
D4
D4
UiRB register
TC
Receive data is taken in
D5
D5
D6
D6
Set to 0 when interrupt request is acknowledged, or set by a program
D7
D7
D0 D1
Set to 0 when interrupt request is acknowledged, or set by a program
D0 D1
D2
D3
D2
Read out from UiRB register
D3
D4
TC = TCLK = 2(n+1)/fi
D5
D4
fi: Frequency of UiBRG count source (f1, f8, f32)
n: Setting value to UiBRG register
D6
D5
D7
Stop pulsing because the TE bit is set to 0
D0 D1
D2
D3
D4
15. Serial Interface
D5
D6
D7

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