MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 86

IC MCU 60K FLASH 8MHZ 32-LQFP

MC908GZ60CFJE

Manufacturer Part Number
MC908GZ60CFJE
Description
IC MCU 60K FLASH 8MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GZ60CFJE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Clock Generator Module (CGM)
4.5.3 PLL Multiplier Select Register High
The PLL multiplier select register high (PMSH) contains the programming information for the high byte of
the modulo feedback divider.
MUL11–MUL8 — Multiplier Select Bits
PMSH[7:4] — Unimplemented Bits
4.5.4 PLL Multiplier Select Register Low
The PLL multiplier select register low (PMSL) contains the programming information for the low byte of
the modulo feedback divider.
86
These read/write bits control the high byte of the modulo feedback divider that selects the VCO
frequency multiplier N. (See
the multiplier select registers configures the modulo feedback divider the same as a value of $0001.
Reset initializes the registers to $0040 for a default multiply value of 64.
These bits have no function and always read as 0s.
Address:
Address:
The multiplier select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1).
For applications using 1–8 MHz reference frequencies this register must be
reprogrammed before enabling the PLL. The reset value of this register will
cause applications using 1–8 MHz reference frequencies to become
unstable if the PLL is enabled without programming an appropriate value.
The programmed value must not allow the VCO clock to exceed 32 MHz.
See
proper value for PMSL.
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
4.3.6 Programming the PLL
Figure 4-6. PLL Multiplier Select Register High (PMSH)
$0038
$0038
Figure 4-7. PLL Multiplier Select Register Low (PMSL)
MUL7
Bit 7
Bit 7
0
0
0
= Unimplemented
4.3.3 PLL Circuits
MUL6
6
0
0
6
1
MUL5
5
0
0
5
0
for detailed instructions on choosing the
NOTE
NOTE
and
MUL4
4
0
0
4
0
4.3.6 Programming the
MUL11
MUL3
3
0
3
0
MUL10
MUL2
2
0
2
0
MUL9
MUL1
PLL.) A value of $0000 in
1
0
1
0
Freescale Semiconductor
MUL8
MUL0
Bit 0
Bit 0
0
0

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