MC908GZ60CFJE Freescale Semiconductor, MC908GZ60CFJE Datasheet - Page 87

• Manufacturer Part Number: MC908GZ60CFJE
• Description: IC MCU 60K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ60CFJE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: CAN, ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MUL7–MUL0 — Multiplier Select Bits
4.5.5 PLL VCO Range Select Register
The PLL VCO range select register (PMRS) contains the programming information required for the
hardware configuration of the VCO.
VRS7–VRS0 — VCO Range Select Bits
Freescale Semiconductor
These read/write bits control the low byte of the modulo feedback divider that selects the VCO
frequency multiplier, N. (See
be written when the PLLON bit in the PCTL is set. A value of $0000 in the multiplier select registers
configures the modulo feedback divider the same as a value of $0001. Reset initializes the register to
$40 for a default multiply value of 64.
These read/write bits control the hardware center-of-range linear multiplier L which, in conjunction with
E (See
hardware center-of-range frequency, f
PCTL is set. (See
register disables the PLL and clears the BCS bit in the PLL control register (PCTL). (See
Clock Selector Circuit
for a default range multiply value of 64.
4.3.3 PLL
Address:
The multiplier select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1).
Verify that the value of the PMRS register is appropriate for the given
reference and VCO clock frequencies before enabling the PLL. See
Programming the PLL
for these control bits.
The VCO range select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Circuits,
4.3.7 Special Programming
$003A
VRS7
Bit 7
Figure 4-8. PLL VCO Range Select Register (PMRS)
and
0
4.3.7 Special Programming
4.3.6 Programming the
4.3.3 PLL Circuits
VRS6
6
1
for detailed instructions on selecting the proper value
VRS
VRS5
5
0
. VRS7–VRS0 cannot be written when the PLLON bit in the
NOTE
NOTE
NOTE
Exceptions.) A value of $00 in the VCO range select
and
VRS4
4
0
PLL, and
4.3.6 Programming the
Exceptions.). Reset initializes the register to $40
VRS3
3
0
4.5.1 PLL Control
VRS2
2
0
VRS1
PLL.) MUL7–MUL0 cannot
1
0
Register.), controls the
4.3.6
VRS0
Bit 0
0
CGM Registers
4.3.8 Base
87