MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 236

IC MCU 64K 8MHZ SPI 48-LQFP

MC908AP64CFAE

Manufacturer Part Number
MC908AP64CFAE
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP64CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
Package
48LQFP
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Multi-Master IIC Interface (MMIIC)
14.6.1
MMAD[7:1] — Multi-Master Address
MMEXTAD — Multi-Master Expanded Address
234
These seven bits represent the MMIIC interface’s own specific slave address when in slave mode, and
the calling address when in master mode. Software must update MMAD[7:1] as the calling address
while entering master mode and restore its own slave address after master mode is relinquished. This
register is cleared as $A0 upon reset.
This bit is set to expand the address of the MMIIC in slave mode. When set, the MMIIC will
acknowledge the following addresses from a calling master: $MMAD[7:1], 0000000, and 0001100.
Reset clears this bit.
For example, when MMADR is configured as:
The MMIIC module will respond to the calling address:
or the general calling address:
or the calling address:
Note that bit-0 of the 8-bit calling address is the MMRW bit from the calling master.
1 = MMIIC responds to the following calling addresses:
0 = MMIIC responds to address $MMAD[7:1]
MMIIC
$MMAD[7:1], 0000000, and 0001100.
Address:
Reset:
Read:
Write:
Address Register (MMADR)
MMAD7
Bit 7
Bit 7
1
1
0
0
MMAD7
$0048
Bit 7
1
Figure 14-4. MMIIC Address Register (MMADR)
MMAD6
1
6
1
0
6
0
MMAD6
6
0
MC68HC908AP Family Data Sheet, Rev. 4
MMAD5
0
5
0
0
5
0
MMAD5
5
1
MMAD4
1
4
1
0
4
1
MMAD4
4
0
MMAD3
0
3
0
0
3
1
MMAD3
3
0
MMAD2
1
2
1
0
2
0
MMAD2
2
0
MMAD1
Bit 1
Bit 1
0
0
0
0
MMAD1
1
0
MMEXTAD
1
Freescale Semiconductor
MMEXTAD
Bit 0
0

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