M30260F8AGP#U3A Renesas Electronics America, M30260F8AGP#U3A Datasheet - Page 327
M30260F8AGP#U3A
Manufacturer Part Number
M30260F8AGP#U3A
Description
IC M16C/26A MCU FLASH 64K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Specifications of M30260F8AGP#U3A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
M30260F8AGP#U3AM30260F8AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30260F8AGP#U3AM30260F8AGP#D5
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Part Number:
M30260F8AGP#U3AM30260F8AGP#U3
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10 000
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R
R
M
19.7 Timer
e
E
1
. v
J
6
0
C
19.7.1 Timer A
2
9
0 .
B
2 /
0
0
19.7.1.1 Timer A (Timer Mode)
19.7.1.2 Timer A (Event Counter Mode)
6
2
A
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
0
F
2
e
G
0 -
(i = 0 to 4) register and the TAi register before setting the TAiS bit in the TABSR register to “1” (count
starts).
Always make sure the TAiMR register is modified while the TAiS bit remains “0” (count stops)
regardless whether after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always “FFFF
counting, the read value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
(i = 0 to 4) register, the TAi register, the UDF register, the TAZIE, TA0TGL and TA0TGH bits in the
ONSF register and the TRGSR register before setting the TAiS bit in the TABSR register to “1”
(count starts).
Always make sure the TAiMR register, the UDF register, the TAZIE, TA0TGL and TA0TGH bits and
the TRGSR register are modified while the TAiS bit remains “0” (count stops) regardless whether
after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always “FFFF
flows. If the TAi register is read after setting a value in it, but before the counter starts counting, the
read value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
b
o r
1 .
2
0
u
, 5
0
p
2
(
0
M
0
7
1
6
C
page 308
2 /
6
16
, A
16
”. If the TAi register is read after setting a value in it, but before the counter starts
” when the timer counter underflows and “0000
M
1
f o
6
C
3
2
2 /
9
6
, B
M
1
6
C
_____
_____
2 /
6
) T
_____
_____
16
” when the timer counter over-
OUT
OUT
, TA2
, TA2
OUT
OUT
19. Usage Notes
and TA4
and TA4
OUT
OUT
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