M30260F8AGP#U3A Renesas Electronics America, M30260F8AGP#U3A Datasheet - Page 336
M30260F8AGP#U3A
Manufacturer Part Number
M30260F8AGP#U3A
Description
IC M16C/26A MCU FLASH 64K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Specifications of M30260F8AGP#U3A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M30260F8AGP#U3AM30260F8AGP#D3
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Quantity:
10 000
Part Number:
M30260F8AGP#U3AM30260F8AGP#D5
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Part Number:
M30260F8AGP#U3AM30260F8AGP#U3
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M
R
R
e
E
19.10 Programmable I/O Ports
1
. v
J
6
0
C
2
9
0 .
2 /
B
1. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to “1”
2. The input threshold voltage of pins differs between programmable input/output ports and peripheral
3. When the INV03 bit in the INVC0 register is "1"(three-phase motor control timer output enabled), an "L"
0
0
6
(three-phase output forcible cutoff by input on SD pin enabled), the P7
a high-impedance state.
functions.
Therefore, if any pin is shared by a programmable input/output port and a peripheral function and the
input level at this pin is outside the range of recommended operating conditions V
“high” nor “low”), the input level may be determined differently depending on which side—the program-
mable input/output port or the peripheral function—is currently selected.
input on the P8
Therefore, the P8
When the SD function isn't used, set PD8
2
A
0
F
2
e
G
0 -
b
•When the IVPCR1 bit in the TB2SC register is set to “1” (three-phase output forcible cutoff by input
•When the IVPCR1 bit is set to “0” (three-phase output forcible cutoff by input on SD pin
o r
1 .
2
on the SD pin enabled), the U/ U/ V/ V/ W/ W pins go to a high-impedance state.
disabled), the U/ U/ V/ V/ W/ W pins go to a normal port.
0
u
, 5
0
p
2
(
0
_____
M
0
7
1
_____
6
C
5
page 317
2 /
_______ _____
/NMI/SD pin, has the following effect:
5
6
pin can not be used as programmable I/O port when the INV03 bit is set to "1".
, A
M
__
1
f o
6
C
3
2
2 /
__
9
6
, B
M
___
1
__
_____
6
C
2 /
5
6
__
to “0” (Input) and pull the P8
) T
_____
___
2
to P7
5
_______ _____
/NMI/SD pin to “H” externally.
5
, P8
0
and P8
IH
and V
_____
19. Usage Notes
1
IL
pins go to
(neither
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