HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 217
HD64F3664FPV
Manufacturer Part Number
HD64F3664FPV
Description
IC H8/3664 MCU FLASH 32K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of HD64F3664FPV
Core Size
16-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300H
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
No. Of I/o's
29
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3664FPV
Manufacturer:
MURATA
Quantity:
34 000
Company:
Part Number:
HD64F3664FPV
Manufacturer:
HD
Quantity:
465
Company:
Part Number:
HD64F3664FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3664FPV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Bit
4
3
2
1
0
Bit Name
FER
PER
TEND
MPBR
MPBT
Initial Value
0
0
1
0
0
R/W
R/W
R/W
R
R
R/W
Description
Framing Error
[Setting condition]
•
[Clearing condition]
•
Parity Error
[Setting condition]
•
[Clearing condition]
•
Transmit End
[Setting conditions]
•
•
[Clearing conditions]
•
•
Multiprocessor Bit Receive
MPBR stores the multiprocessor bit in the receive
character data. When the RE bit in SCR3 is
cleared to 0, its previous state is retained.
Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to
the transmit character data.
When a framing error occurs in reception
When 0 is written to FER after reading FER =
1
When a parity error is generated during
reception
When 0 is written to PER after reading PER =
1
When the TE bit in SCR3 is 0
When TDRE = 1 at transmission of the last bit
of a 1-byte serial transmit character
When 0 is written to TEND after reading TEND
= 1
When the transmit data is written to TDR
Rev. 5.00, 03/04, page 189 of 388
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