MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 144

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 3 Port Integration Module (PIM9E128V1)
3.3.3.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
3.3.3.6
Read: Anytime. Write: Anytime.
The Port P Polarity Select Register selects whether a pull-down or a pull-up device is connected to the pin.
The Port P Polarity Select Register is effective only when the corresponding Data Direction Register bit
is set to 0 (input) and the corresponding Pull Device Enable Register bit is set to 1.
144
PERP[5:0]
PPSP[5:0]
Reset
Reset
Field
Field
5:0
5:0
W
W
R
R
Pull Device Enable Port P
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Polarity Select Port P
0 A pull-up device is connected to the associated port P pin.
1 A pull-down device is connected to the associated port P pin.
Port P Pull Device Enable Register (PERP)
Port P Polarity Select Register (PPSP)
0
0
0
0
7
7
= Reserved or Unimplemented
= Reserved or Unimplemented
Figure 3-21. Port P Pull Device Enable Register (PERP)
0
0
0
0
6
6
Figure 3-22. Port P Polarity Select Register (PPSP)
Table 3-16. PERP Field Descriptions
Table 3-17. PPSP Field Descriptions
PERP5
PPSP5
MC9S12E128 Data Sheet, Rev. 1.07
0
0
5
5
PERP4
PPSP4
0
0
4
4
Description
Description
PERP3
PPSP3
0
0
3
3
PERP2
PPSP2
0
0
2
2
PERP1
PPSP1
Freescale Semiconductor
0
0
1
1
PERP0
PPSP0
0
0
0
0

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