MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 150

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 3 Port Integration Module (PIM9E128V1)
3.3.5.4
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
3.3.5.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input or
wired-or (open drain) output pins. If a pin is configured as push-pull output, the corresponding Pull Device
Enable Register bit has no effect.
150
RDRS[7:0]
PERS[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
RDRS7
PERS7
Reduced Drive Port S
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
Pull Device Enable Port S
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Port S Reduced Drive Register (RDRS)
Port S Pull Device Enable Register (PERS)
0
1
7
7
= Reserved or Unimplemented
RDRS6
PERS6
Figure 3-33. Port S Pull Device Enable Register (PERS)
0
1
6
6
Figure 3-32. Port S Reduced Drive Register (RDRS)
Table 3-23. RDRS Field Descriptions
Table 3-24. PERS Field Descriptions
RDRS5
PERS5
MC9S12E128 Data Sheet, Rev. 1.07
0
1
5
5
RDRS4
PERS4
0
1
4
4
Description
Description
RDRS3
PERS3
0
1
3
3
RDRS2
PERS2
0
1
2
2
RDRS1
PERS1
Freescale Semiconductor
0
1
1
1
RDRS0
PERS0
0
1
0
0

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