MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 434

• Manufacturer Part Number: MC9S12E128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 90
• Ram Memory Size: 8KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 13 Timer Module (TIM16B4CV1)
13.3.2.17 Pulse Accumulators Count Registers (PACNT)
Read: Anytime
Write: Anytime
These registers contain the number of active input edges on its input pin since the last reset.
When PACNT overflows from 0xFFFF to 0x0000, the Interrupt flag PAOVF in PAFLG (0x0021) is set.
Full count register access should take place in one clock cycle. A separate read/write for high byte and low
byte will give a different result than accessing them as a word.
434
Reset
Reset
W
W
R
R
PACNT15
PACNT7
15
0
0
7
edge on the pulse accumulator input pin may miss the last count because the
input has to be synchronized with the bus clock first.
Reading the pulse accumulator counter registers immediately after an active
Figure 13-24. Pulse Accumulator Count Register High (PACNTH)
Figure 13-25. Pulse Accumulator Count Register Low (PACNTL)
PACNT14
PACNT6
14
0
0
6
PACNT13
PACNT5
MC9S12E128 Data Sheet, Rev. 1.07
13
0
0
5
PACNT12
PACNT4
NOTE
12
0
0
4
PACNT11
PACNT3
11
0
0
3
PACNT10
PACNT2
10
0
0
2
PACNT9
PACNT1
Freescale Semiconductor
0
0
9
1
PACNT8
PACNT0
0
0
0
0