MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 459

• Manufacturer Part Number: MC9S12E128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 90
• Ram Memory Size: 8KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

firmware. The standard BDM firmware watches for serial commands and executes them as they are
received.
The firmware commands are shown in
1
2
15.4.5
Hardware and firmware BDM commands start with an 8-bit opcode followed by a 16-bit address and/or a
16-bit data word depending on the command. All the read commands return 16 bits of data despite the byte
or word implication in the command name.
Freescale Semiconductor
READ_NEXT
READ_PC
READ_D
READ_X
READ_Y
READ_SP
WRITE_NEXT
WRITE_PC
WRITE_D
WRITE_X
WRITE_Y
WRITE_SP
GO
GO_UNTIL
TRACE1
TAGGO
Command
If enabled, ACK will occur when data is ready for transmission for all BDM READ commands and will occur after the write is
complete for all BDM WRITE commands.
Both WAIT (with clocks to the S12 CPU core disabled) and STOP disable the ACK function. The GO_UNTIL command will not
get an Acknowledge if one of these two CPU instructions occurs before the “UNTIL” instruction. This can be a problem for any
instruction that uses ACK, but GO_UNTIL is a lot more difficult for the development tool to time-out.
2
1
BDM Command Structure
8-bit reads return 16-bits of data, of which, only one byte will contain valid
data. If reading an even address, the valid data will appear in the MSB. If
reading an odd address, the valid data will appear in the LSB.
Opcode (hex)
0C
62
63
64
65
66
67
42
43
44
45
46
47
08
10
18
16-bit data out
16-bit data out
16-bit data out
16-bit data out
16-bit data out
16-bit data out
16-bit data in
16-bit data in
16-bit data in
16-bit data in
16-bit data in
16-bit data in
None
None
None
None
Data
Table 15-6. Firmware Commands
MC9S12E128 Data Sheet, Rev. 1.07
Table
Increment X by 2 (X = X + 2), then read word X points to.
Read program counter.
Read D accumulator.
Read X index register.
Read Y index register.
Read stack pointer.
Increment X by 2 (X = X + 2), then write word to location pointed to by X.
Write program counter.
Write D accumulator.
Write X index register.
Write Y index register.
Write stack pointer.
Go to user program. If enabled, ACK will occur when leaving active
background mode.
Go to user program. If enabled, ACK will occur upon returning to active
background mode.
Execute one user instruction then return to active BDM. If enabled, ACK
will occur upon returning to active background mode.
Enable tagging and go to user program. There is no ACK pulse related to
this command.
15-6.
NOTE
Chapter 15 Background Debug Module (BDMV4)
Description
459