MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 483

• Manufacturer Part Number: MC9S12E128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 90
• Ram Memory Size: 8KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.3.2.3
Freescale Semiconductor
Reset
Reset
Field
15:0
W
W
R
R
Bit 15
Bit 7
Trace Buffer Data Bits — The trace buffer data bits contain the data of the trace buffer. This register can be read
only as a word read. Any byte reads or misaligned access of these registers will return 0 and will not cause the
trace buffer pointer to increment to the next trace buffer address. The same is true for word reads while the
debugger is armed. In addition, this register may appear to contain incorrect data if it is not read with the same
capture mode bit settings as when the trace buffer data was recorded (See
Trace
Debug Trace Buffer Register (DBGTB)
15
u
u
7
Buffer”). Because reads will reflect the contents of the trace buffer RAM, the reset state is undefined.
= Unimplemented or Reserved
= Unimplemented or Reserved
Bit 14
Figure 16-6. Debug Trace Buffer Register High (DBGTBH)
Bit 6
Figure 16-7. Debug Trace Buffer Register Low (DBGTBL)
14
u
u
6
Table 16-7. DBGTB Field Descriptions
Bit 13
Bit 5
MC9S12E128 Data Sheet, Rev. 1.07
13
u
u
5
Bit 12
Bit 4
12
u
u
4
Description
Bit 11
Bit 3
11
u
u
3
Bit 10
Bit 2
Section 16.4.2.9, “Reading Data from
10
u
u
2
Chapter 16 Debug Module (DBGV1)
Bit 9
Bit 1
u
u
9
1
Bit 8
Bit 0
u
u
8
0
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