MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 32

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 1 Device Overview MC9S12XD-Family
1.1.1
32
HCS12X Core
— 16-bit HCS12X CPU
— EBI (external bus interface)
— MMC (module mapping control)
— INT (interrupt controller)
— DBG (debug module to monitor HCS12X CPU and XGATE bus activity)
— BDM (background debug mode)
XGATE (peripheral coprocessor)
— Parallel processing module off loads the CPU by providing high-speed data processing and
— Data transfer between Flash EEPROM, RAM, peripheral modules, and I/O ports
PIT (periodic interrupt timer)
— Four timers with independent time-out periods
— Time-out periods selectable between 1 and 2
CRG (clock and reset generator)
— Low noise/low power Pierce oscillator
— PLL
— COP watchdog
— Real time interrupt
— Clock monitor
— Fast wake-up from stop mode
Port H & Port J with interrupt functionality
— Digital filtering
— Programmable rising or falling edge trigger
Memory
— 512, 256 and 128-Kbyte Flash EEPROM
— 4 and 2-Kbyte EEPROM
— 32, 16 and 12-Kbyte RAM
One 16-channel and one 8-channel ADC (analog-to-digital converter)
– Upward compatible with MC9S12 instruction set
– Interrupt stacking and programmer’s model identical to MC9S12
– Instruction queue
– Enhanced indexed addressing
– Enhanced instruction set
transfer
MC9S12XD/B/A Family Features
This section lists the features which are available on
MC9S12XDP512RMV2. See
availability of features and memory sizes on other family members.
MC9S12XDP512 Data Sheet, Rev. 2.21
Appendix E Derivative Differences
24
bus clock cycles
for
Freescale Semiconductor

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