MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 452

IC MCU 256K FLASH 80-QFP

MC9S12XDT256CAA

Manufacturer Part Number
MC9S12XDT256CAA
Description
IC MCU 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256CAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.3.3.1.2
452
ID[10:3]
ID[6:0]
Field
Field
RTR
7:1
7:0
0
Reset:
Reset:
Reset:
W
W
W
R
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Remote Transmission Request — This flag reflects the status of the remote transmission request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
IDR0–IDR3 for Standard Identifier Mapping
ID10
ID6
ID2
x
x
x
7
Figure 10-29. Identifier Register 3 (IDR3) — Extended Identifier Mapping
7
7
Table 10-28. IDR3 Register Field Descriptions — Extended
Table 10-29. IDR0 Register Field Descriptions — Standard
Figure 10-30. Identifier Register 0 — Standard Mapping
Figure 10-31. Identifier Register 1 — Standard Mapping
= Unused; always read ‘x’
ID5
ID9
ID1
6
x
6
x
6
x
MC9S12XDP512 Data Sheet, Rev. 2.21
ID4
ID8
ID0
5
x
5
x
5
x
RTR
ID3
ID7
4
x
4
x
4
x
Description
Description
IDE (=0)
ID2
ID6
3
x
3
x
3
x
ID1
ID5
x
x
x
2
2
2
Table
Freescale Semiconductor
ID0
ID4
10-30.
x
x
x
1
1
1
RTR
ID3
x
x
x
0
0
0

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