MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 754

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 20 S12X Debug (S12XDBGV3) Module
20.3.2.5
Read: Anytime when unlocked and not secured and not armed.
Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer
contents.
756
Address: 0x0024, 0x0025
Bit[15:0]
Reset
Field
15–0
W
R
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
15
X
Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 64-bit wide data lines of the
Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer
which points to the next address to be read. When the ARM bit is written to 1 the trace buffer is locked to prevent
reading. The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when
the module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned
access of these registers will return 0 and will not cause the trace buffer pointer to increment to the next trace
buffer address. The same is true for word reads while the debugger is armed. System resets do not affect the
trace buffer contents. The POR state is undefined.
Debug Trace Buffer Register (DBGTBH:DBGTBL)
14
X
13
X
Figure 20-7. Debug Trace Buffer Register (DBGTB)
12
X
Table 20-16. DBGTB Field Descriptions
11
X
MC9S12XDP512 Data Sheet, Rev. 2.21
10
X
X
9
Bit 8
X
8
Description
Bit 7
X
7
Bit 6
X
6
Bit 5
X
5
Bit 4
X
4
Bit 3
X
3
Freescale Semiconductor
Bit 2
X
2
Bit 1
X
1
Bit 0
X
0