MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 845

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3.2.28 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
22.3.2.29 Port S Wired-OR Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
This register configures the output pins as wired-OR. If enabled the output is driven active low only
(open-drain). A logic level of “1” is not driven. It applies also to the SPI and SCI outputs and allows a
multipoint connection of several serial modules. These bits have no influence on pins used as inputs.
Freescale Semiconductor
WOMS[7:0]
PPSS[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
WOMS7
PPSS7
Pull Select Port S
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
Wired-OR Mode Port S
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
0
0
7
7
and if the port is used as input or as wired-OR output.
and if the port is used as input.
WOMS6
PPSS6
Figure 22-31. Port S Wired-OR Mode Register (WOMS)
0
0
6
6
Figure 22-30. Port S Polarity Select Register (PPSS)
Table 22-31. WOMS Field Descriptions
Table 22-30. PPSS Field Descriptions
WOMS5
PPSS5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
WOMS4
PPSS4
0
0
4
4
Description
Description
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
WOMS3
PPSS3
0
0
3
3
WOMS2
PPSS2
0
0
2
2
WOMS1
PPSS1
0
0
1
1
WOMS0
PPSS0
0
0
0
0
847