MC9S12XDT256CAA Freescale Semiconductor, MC9S12XDT256CAA Datasheet - Page 969

• Manufacturer Part Number: MC9S12XDT256CAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256CAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PJ2
PJ0
Pin
1. Depending on ROMON bit. Refer to Device Guide, S12X_EBI section and S12X_MMC section for details.
23.0.10 Low-Power Options
23.0.10.1 Run Mode
No low-power options exist for this module in run mode.
23.0.10.2 Wait Mode
No low-power options exist for this module in wait mode.
23.0.10.3 Stop Mode
All clocks are stopped. There are asynchronous paths to generate interrupts from stop on port P, H,
and J.
Initialization and Application Information
•
•
Normal Single-
It is not recommended to write PORTx and DDRx in a word access. When changing the
register pins from inputs to outputs, the data may have extra transitions during the write
access. Initialize the port data register before enabling the outputs.
Power consumption will increase the more the voltages on general purpose input pins
deviate from the supply voltages towards mid-range because the digital input buffers
operate in the linear region.
Table 23-70. Expanded Bus Pin Functions versus Operating Modes (continued)
GPIO
GPIO
Chip
Single-Chip Modes
Special Single-
GPIO
GPIO
Chip
Expanded
Normal
GPIO
GPIO
CS1
CS3
or
or
Single-Chip
Emulation
GPIO
GPIO
Expanded Modes
Emulation
Expanded
GPIO
GPIO
CS1
CS3
or
or
Special
GPIO
GPIO
Test
CS1
CS3
or
or