C8051F021-GQ Silicon Laboratories Inc, C8051F021-GQ Datasheet - Page 80
Manufacturer Part Number
IC 8051 MCU 64K FLASH 64TQFP
Silicon Laboratories Inc
Specifications of C8051F021-GQ
Program Memory Type
Program Memory Size
64KB (64K x 8)
Package / Case
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
A/D 8x8b, 8x12b; D/A 2x12b
-40°C ~ 85°C
Data Bus Width
Data Ram Size
Maximum Clock Frequency
Number Of Programmable I/os
Number Of Timers
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
Minimum Operating Temperature
- 40 C
8-ch x 8-bit or 8-ch x 12-bit
2-ch x 12-bit
No. Of I/o's
Ram Memory Size
No. Of Timers
No. Of Pwm Channels
Data Rom Size
A/d Bit Size
A/d Channels Available
Supply Voltage (max)
Supply Voltage (min)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1200 - DEV KIT FOR F020/F021/F022/F023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bonase Electronics (HK) Co., Limited
AD1EN: ADC1 Enable Bit.
0: ADC1 Disabled. ADC1 is in low-power shutdown.
1: ADC1 Enabled. ADC1 is active and ready for data conversions.
AD1TM: ADC1 Track Mode Bit.
0: Normal Track Mode: When ADC1 is enabled, tracking is continuous unless a conversion is in pro-
1: Low-power Track Mode: Tracking Defined by AD1STM2-0 bits (see below).
AD1INT: ADC1 Conversion Complete Interrupt Flag.
This flag must be cleared by software.
0: ADC1 has not completed a data conversion since the last time this flag was cleared.
1: ADC1 has completed a data conversion.
AD1BUSY: ADC1 Busy Bit.
0: ADC1 Conversion is complete or a conversion is not currently in progress. AD1INT is set to logic
1 on the falling edge of AD1BUSY.
1: ADC1 Conversion is in progress.
0: No Effect.
1: Initiates ADC1 Conversion if AD1STM2-0 = 000b
AD1CM2-0: ADC1 Start of Conversion Mode Select.
AD1TM = 0:
000: ADC1 conversion initiated on every write of ‘1’ to AD1BUSY.
001: ADC1 conversion initiated on overflow of Timer 3.
010: ADC1 conversion initiated on rising edge of external CNVSTR.
011: ADC1 conversion initiated on overflow of Timer 2.
1xx: ADC1 conversion initiated on write of ‘1’ to AD0BUSY (synchronized with ADC0 software-
AD1TM = 1:
000: Tracking initiated on write of ‘1’ to AD1BUSY and lasts 3 SAR1 clocks, followed by conver-
001: Tracking initiated on overflow of Timer 3 and lasts 3 SAR1 clocks, followed by conversion.
010: ADC1 tracks only when CNVSTR input is logic low; conversion starts on rising CNVSTR edge.
011: Tracking initiated on overflow of Timer 2 and lasts 3 SAR1 clocks, followed by conversion.
1xx: Tracking initiated on write of ‘1’ to AD0BUSY and lasts 3 SAR1 clocks, followed by conver-
UNUSED. Read = 0b. Write = don’t care.
Figure 7.6. ADC1CN: ADC1 Control Register (C8051F020/1/2/3)
AD1INT AD1BUSY AD1CM2 AD1CM1