MC9S12XDT512CAG Freescale Semiconductor, MC9S12XDT512CAG Datasheet - Page 204
MC9S12XDT512CAG
Manufacturer Part Number
MC9S12XDT512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of MC9S12XDT512CAG
Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Chapter 6 XGATE (S12XGATEV2)
6.4.4
The XGATE module offers a set of eight hardware semaphores. These semaphores provide a mechanism
to protect system resources that are shared between two concurrent threads of program execution; one
thread running on the S12X_CPU and one running on the XGATE RISC core.
Each semaphore can only be in one of the three states: “Unlocked”, “Locked by S12X_CPU”, and “Locked
by XGATE”. The S12X_CPU can check and change a semaphore’s state through the XGATE semaphore
register (XGSEM, see
this through its SSEM and CSEM instructions.
Figure 6-21
204
Semaphores
illustrates the valid state transitions.
Section 6.3.1.6, “XGATE Semaphore Register
LOCKED BY
%1
SSEM Instruction
CSEM Instruction
S12X_CPU
XGSEM
Figure 6-21. Semaphore State Transitions
MC9S12XDP512 Data Sheet, Rev. 2.21
UNLOCKED
%0
CSEM Instruction
XGSEM
%1
%0
SSEM Instruction
LOCKED BY
(XGSEM)”). The RISC core does
XGATE
XGSEM
XGSEM
Freescale Semiconductor
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