DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 211
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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2.2.55
RTE (ReTurn from Exception)
Operation
Assembly-Language Format
RTE
Operand Size
—
Description
This instruction returns from an exception-handling routine by restoring the EXR, condition-code
register (CCR) and program counter (PC) from the stack. Program execution continues from the
address restored to the program counter. The CCR and PC contents at the time of execution of this
instruction are lost. If the extended control regiser (EXR) is valid, it is also restored (and the
existing EXR contents are lost).
Operand Format and Number of States Required for Execution
Note: * Six states when EXR is valid.
Addressing
When EXR is invalid
@SP+
@SP+
When EXR is valid
@SP+
@SP+
@SP+
Mode
—
RTE
CCR
PC
EXR
CCR
PC
Mnemonic
RTE
Operands
1st byte
5
6
Condition Code
I:
UI: Restored from the corresponding bit on
H: Restored from the corresponding bit on
U: Restored from the corresponding bit on
N: Restored from the corresponding bit on
Z: Restored from the corresponding bit on
V: Restored from the corresponding bit on
C: Restored from the corresponding bit on
2nd byte
7
Instruction Format
Restored from the corresponding bit on
the stack.
the stack.
the stack.
the stack.
the stack.
the stack.
the stack.
the stack.
Rev. 4.00 Feb 24, 2006 page 195 of 322
I
0
UI H
Return from Exception Handling
Section 2 Instruction Descriptions
3rd byte
U
N
4th byte
REJ09B0139-0400
Z
V
States
No. of
C
5*
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