MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 110
MC56F8346MFVE
Manufacturer Part Number
MC56F8346MFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8346VFVE.pdf
(178 pages)
Specifications of MC56F8346MFVE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
62
Data Ram Size
4 KB
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8346MFVE
Manufacturer:
Freescale
Quantity:
42
Company:
Part Number:
MC56F8346MFVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8346MFVE
Manufacturer:
FREESCALE
Quantity:
20 000
These are discussed in more detail in the sections that follow.
6.2 Features
The SIM has the following features:
110
•
•
•
•
•
•
•
•
•
•
•
Enforcing Flash security
Flash security feature prevents unauthorized access to code/data contained in on-chip Flash memory
Power-saving clock gating for peripheral
Three power modes (Run, Wait, Stop) to control power utilization
— Stop mode shuts down the 56800E core, system clock, peripheral clock, and PLL operation
— Stop mode entry can optionally disable PLL and Oscillator (low power vs. fast restart); must be
— Wait mode shuts down the 56800E core and unnecessary system clock operation
— Run mode supports full part operation
Controls to enable/disable the 56800E core WAIT and STOP instructions
Calculates base delay for reset extension based upon POR or RESET operations. Reset delay will be either
3 x 32 clocks (phased release of reset) for reset, except for POR, which is 2
Controls reset sequencing after reset
Software-initiated reset
Four 16-bit registers reset only by a Power-On Reset usable for general-purpose software control
System Control Register
Registers for software access to the JTAG ID of the chip
explicitly done
56F8346 Technical Data, Rev. 15
21
clock cycles.
Freescale Semiconductor
Preliminary