M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 118

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Table 10.8
NOTES:
CM04, CM05, CM06, CM07
CM10, CM11, CM16, CM17
CM20, CM21
PLC07
Current
State
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
1.
2.
3.
4.
5.
6.
7.
8.
9.
No Division
Divided by 2
Divided by 4
Divided by 8
Divided by 16
No Division
Divided by 2
Divided by 4
Divided by 8
Divided by 16
CM04 = 0
CM04 = 1
CM06 = 0, CM17 = 0, CM16 = 0
CM06 = 0, CM17 = 0, CM16 = 1
CM06 = 0, CM17 = 1, CM16 = 0
CM06 = 0, CM17 = 1, CM16 = 1
CM06 = 1
CM07 = 0
CM07 = 1
Avoid making a transition when the CM20 bit is set in to “1” (oscillation stop, re-oscillation detection function enabled).
Set the CM20 bit to “0” (oscillation stop, re-oscillation detection function disabled) before transiting.
On-chip oscillator clock oscillates and stops in low-speed mode. In this mode, the on-chip oscillator can be used as peripheral function clock.
Sub clock oscillates and stops in PLL operating mode. In this mode, sub clock can be used as peripheral function clock.
PLL operating mode can only be entered from and changed to high-speed mode.
Set the CM06 bit to “1” (division by 8 mode) before transiting from on-chip oscillator mode to high- or middle-speed mode.
When exiting stop mode, the CM0S6 bit is set to “1” (division by 8 mode).
If the CM05 bit set to “1” (main clock stop), then the CM06 bit is set to “1” (division by 8 mode).
A transition can be made only when sub clock is oscillating.
State transitions within the same mode (divide-by-n values changed or subclock oscillation turned on or off) are shown in the table below.
( ) : setting method. See the following table.
High-Speed Mode,
Middle-Speed Mode
Low-Speed Mode
Low Power
Dissipation Mode
PLL Operating
Mode
On-chip Oscillator
Mode
On-chip Oscillator
Low Power
Dissipation Mode
Stop Mode
Wait Mode
Jan 10, 2006
(2)
Setting
Allowed Transition and Setting
No
Division
(2)
(3)
(3)
(3)
(3)
(2)
−
−
−
−
: Bits in CM0 register
: Bits in PLC0 register
: Bits in CM1 register
: Bits in CM2 register
Page 101 of 390
High-Speed Mode,
Middle-Speed
Mode
Divided by
2
(12)
(14)
(18)
(NOTE 8)
(4)
(4)
(4)
(4)
(2)
−
−
−
−
Sub clock turned off
Sub clock oscillating
CPU clock no division mode
CPU clock division by 2 mode
CPU clock division by 4 mode
CPU clock division by 16 mode
CPU clock division by 8 mode
Main clock, PLL clock, or on-chip
oscillator clock selected
Sub clock selected
(18)
(NOTE 3)
(NOTE 4)
(NOTE 5)
(8)
−
−
Sub Clock Oscillating
Divided by
4
(5)
(5)
(5)
(5)
(2)
Operation
−
−
−
−
Low-Speed
Mode
(9)
(NOTE 7)
(10)
(18)
(18)
(2)
−
−
−
Divided by
8
(7)
(7)
(7)
(2)
(7)
−
−
−
−
(9)
Low Power
Dissipation
Mode
(NOTE 1, 6)
(11)
(18)
(18)
Divided by
16
−
−
−
-
(6)
(6)
(6)
(6)
(2)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
−
−
−
−
State After Transition
PLL
Operating
Mode
CM05 = 0
CM05 = 1
PLC07=0, CM11=0
PLC07=1, CM11=1
CM21=0
CM21=1
CM10=1
Wait Instruction
Hardware Interrupt
(NOTE 3)
No
Division
(13)
−
−
−
−
−
−
(2)
(1)
(3)
(3)
(3)
(3)
−
−
−
−
Setting
On-chip
Oscillator
Mode
(NOTE 8)
(NOTE 5)
Divided by
2
(15)
(10)
(18)
(18)
−
−
−
(1)
(4)
(4)
(4)
(4)
−
−
−
−
Sub Clock Turned Off
On-chip Oscillator
Low Power
Dissipation Mode
Main clock oscillating
Main clock turned off
Main clock selected
PLL clock selected
Main clock or PLL clock selected
On-chip oscillator clock selected
Transition to stop mode
Transition to wait mode
Exit stop mode or wait mode
Divided by
4
10. Clock Generation Circuit
(11)
(18)
(NOTE 8)
(1)
(5)
(5)
(5)
(5)
−
−
−
−
(18)
(NOTE 1)
(NOTE 5)
−
−
−
−
Divided by
8
Operation
(1)
(7)
(7)
(7)
(7)
−
−
−
−
Stop
Mode
(NOTE 1)
(NOTE 1)
(NOTE 1)
(NOTE 1)
(NOTE 1)
(16)
(16)
(16)
(16)
(16)
− : Cannot transit
− : Cannot transit
−
−
Divided by
16
(1)
(6)
(6)
(6)
(6)
Wait
Mode
−
−
−
−
(17)
(17)
(17)
(17)
(17)
−
−