M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 396

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
24.15 Flash Memory Version
24.15.1 Functions to Inhibit Rewriting Flash Memory Rewrite
24.15.2 Stop mode
24.15.3 Wait mode
24.15.4 Low power dissipation mode, on-chip oscillator low power dissipation
24.15.5 Writing command and data
24.15.6 Program Command
24.15.7 Lock Bit Program Command
ID codes are stored in addresses 0FFFDFh, 0FFFE3h, 0FFFEBh, 0FFFEFh, 0FFFF3h, 0FFFF7h, and
0FFFFBh. If wrong data are written to theses addresses, the flash memory cannot be read or written in standard
serial I/O mode.
The ROMCP register is mapped in address 0FFFFFh. If wrong data is written to this address, the flash memory
cannot be read or written in parallel I/O mode.
In the flash memory version of microcomputer, these addresses are allocated to the vector addresses (H) of
fixed vectors.
When the microcomputer enters stop mode, execute the instruction which sets the CM10 bit to “1” (stop mode)
after setting the FMR01 bit to “0” (CPU rewrite mode disabled) and disabling the DMA transfer.
When shifting to wait mode, set the FMR01 bit to “0” (CPU rewrite mode disabled) before executing the WAIT
instruction.
If the CM05 bit is set to “1” (main clock stop), the following commands must not be executed.
Write the command code and data at even addresses.
Write “xx40h” in the first bus cycle and write data to the write address in the second bus cycle, and an auto
program operation (data program and verify) will start. Make sure the address value specified in the first bus
cycle is the same even address as the write address specified in the second bus cycle.
Write “77h” in the first bus cycle and write “xxD0h” to the uppermost address of a block (even address,
however) in the second bus cycle, and the lock bit for the specified block is cleared to “0”. Make sure then
address value specified in the first bus cycle is the same uppermost block address that is specified in the second
bus cycle.
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Jan 10, 2006
Program
Block erase
Erase all unlocked blocks
Lock bit program
mode
Page 379 of 390
24. Precautions