MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 188

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

MPC555
USER’S MANUAL
compression purposes. The resulting uncompressed elf code (with compression
hooks) will load and run like any other elf code.
The software compression tool compresses the elf code (x.elf) and produces a com-
pressed elf code (x.elf.sqz). The system sees the compressed elf code as regular elf
formatted code for purposes of loading into hardware (when programming the flash).
However, the decompression module must now be used to run the compressed elf
code.
Figure 4-11
Once generated, this code can be loaded into flash or SRAM (internal or external) .
The compression tool replaces regular PowerPC instructions by their “compressed”
representation which contain fewer data bits. The compressed data bit representation
is contained in the vocabulary. The vocabulary is structured into a binary bounded
Huffman code tree. This method has the result of the first instructions being repre-
sented by fewer bits. Further instructions require more bits for unique decoding.
Therefore, the instructions that occur most in code should be represented earlier in the
vocabulary structure. This would produce the most condensed code. A statistical study
was made of typical application code. The existing vocabulary is fixed for Phase A
Compiler/
Linker
/
MPC556
illustrates the several steps for generating compressed executable code.
Figure 4-11 Code Compression Process (Phase A)
Program
Executable
Non-compressed
Vocabulary
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
x.elf (with hooks)
Rev. 15 October 2000
BURST BUFFER
Compressor
Tool
Program
Executable
Compressed
x.elf.sqz
MOTOROLA
4-12