MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 508

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

SCCxR1 — SCI Control Register 1
MPC555
USER’S MANUAL
RESET:
Bit(s)
MSB
10
11
12
13
0
1
2
3
4
5
6
7
8
9
0
0
0
LOOPS
/
LOOPS
WOMS
WAKE
MPC556
Name
1
0
TCIE
RIE
ILIE
TIE
ILT
RE
PT
PE
TE
—
M
WOM
2
S
0
Reserved
Loop mode
0 = Normal SCI operation, no looping, feedback path disabled.
1 = SCI test operation, looping, feedback path enabled.
Wired-OR mode for SCI Pins
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open drain output.
Idle-line detect type. Refer to
0 = Short idle-line detect (start count on first one).
1 = Long idle-line detect (start count on first one after stop bit(s)).
Parity type. Refer to
0 = Even parity.
1 = Odd parity.
Parity enable. Refer to
0 = SCI parity disabled.
1 = SCI parity enabled.
Mode select. Refer to
0 = 10-bit SCI frame.
1 = 11-bit SCI frame.
Wakeup by address mark. Refer to
0 = SCI receiver awakened by idle-line detection.
1 = SCI receiver awakened by address mark (last bit set).
Transmit interrupt enable
0 = SCI TDRE interrupts disabled.
1 = SCI TDRE interrupts enabled.
Transmit complete interrupt enable
0 = SCI TC interrupts disabled.
1 = SCI TC interrupts enabled.
Receiver interrupt enable
0 = SCI RDRF and OR interrupts disabled.
1 = SCI RDRF and OR interrupts enabled.
Idle-line interrupt enable
0 = SCI IDLE interrupts disabled.
1 = SCI IDLE interrupts enabled.
Transmitter enable
0 = SCI transmitter disabled (TXD pin can be used as general-purpose output)
1 = SCI transmitter enabled (TXD pin dedicated to SCI transmitter).
Receiver Enable
0 = SCI receiver disabled (RXD pin can be used as general-purpose input).
1 = SCI receiver enabled (RXD pin is dedicated to SCI receiver).
ILT
3
0
Freescale Semiconductor, Inc.
Table 14-24 SCCxR1 Bit Descriptions
QUEUED SERIAL MULTI-CHANNEL MODULE
For More Information On This Product,
PT
4
0
PE
5
0
14.8.7.4 Parity
Go to: www.freescale.com
14.8.7.2 Serial
14.8.7.4 Parity
Rev. 15 October 2000
M
6
0
14.8.7.8 Idle-Line
WAKE
7
0
14.8.7.9 Receiver
Checking.
Formats.
Checking.
TIE
Description
8
0
TCIE
Detection.
9
0
Wake-Up.
RIE
10
0
ILIE
0x30 500A, 0x30 5022
11
0
TE
12
0
RE
13
0
MOTOROLA
RWU
14
0
14-46
SBK
LSB
15
0