MPC555LFMZP40 Freescale Semiconductor, MPC555LFMZP40 Datasheet - Page 689

• Manufacturer Part Number: MPC555LFMZP40
• Description: IC MCU 32BIT 40MHZ 272-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFMZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 272-PBGA
• Controller Family/series: POWER 5xx
• Ram Memory Size: 26KB
• Cpu Speed: 63MIPS
• Embedded Interface Type: QSPI, SCI, TouCAN
• Operating Temperature Range: -40°C To +125°C
• No. Of Pins: 272
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• Cpu Family: MPC55xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 101
• Operating Supply Voltage (typ): 5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

19.9.2 FLASH Program/Erase Voltage Conditioning
MPC555
USER’S MANUAL
CMF_EPEE
If EPEE = 1 when EHV is asserted, high voltage operations such as program or erase
are enabled. If EPEE = 0 when EHV is asserted, high voltage operations are disabled.
The EPEE pin uses a two-period clock synchronizer that switches the internal signal
CMF_EPEE after two consecutive constant values of EPEE, as shown in
8. At first the value of CMF_EPEE is unknown, as the prior information for the EPEE
pin is not provided. One high or low clock of EPEE does not cause CMF_EPEE to
switch.
A voltage of at least (VDDL – 0.35 V) must be applied at all times to the VPP pins or
damage to the FLASH module can occur. FLASH modules can be damaged by power
on and power off VPP transients. VPP must not rise to programming level while VDDL
is below 1.0 volts, and must not fall below the minimum specified value while VDDL is
applied.
EPEE
Clock
/
MPC556
Figure 19-9
Figure 19-8 CMF_EPEE Timing Diagram
Freescale Semiconductor, Inc.
shows the VPP and VDDL operating envelope.
For More Information On This Product,
CDR MoneT FLASH EEPROM
Go to: www.freescale.com
Rev. 15 October 2000
Figure 19-
MOTOROLA
19-37