AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 6
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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Table 3-1.
6
Signal Name
PD0 - PD31
PE0 - PE31
DDR_D0 -
DDR_D15
DDR_A0 -
DDR_A13
DDR_CLK-
#DDR_CLK
DDR_CKE
DDR_CS
DDR_WE
DDR_RAS-
DDR_CAS
DDR_DQM[0..1]
DDR_DQS[0..1]
DDR_BA0 -
DDR_BA1
DDR_VREF
D0 -D31
A0 - A25
NWAIT
NCS0 - NCS5
NWR0 - NWR3
NRD
NWE
NBS0 - NBS3
CFCE1 - CFCE2
CFOE
CFWE
CFIOR
CFIOW
CFRNW
AT91SAM9M10
Signal Description List (Continued)
Parallel IO Controller D
Parallel IO Controller E
Data Bus
Address Bus
DDR differential clock input
DDR Clock Enable
DDR Chip Select
DDR Write Enable
Row and Column Signal
Write Data Mask
Data Strobe
Bank Select
Reference Voltage
Data Bus
External Wait Signal
Chip Select Lines
Write Signal
Read Signal
Write Enable
Byte Mask Signal
CompactFlash Chip Enable
CompactFlash Output Enable
CompactFlash Write Enable
CompactFlash IO Read
CompactFlash IO Write
CompactFlash Read Not Write
Address Bus
Function
DDR Memory Interface- DDR2/SDRAM/LPDDR Controller
Static Memory Controller - SMC
External Bus Interface - EBI
CompactFlash Support
I/O
I/O
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
I/O
Output
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Active
Level
Reference
(1)
(1)
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
Voltage
0 at reset
Comments
Pulled-up input at reset
(100k
Pulled-up input at reset
(100k
Pulled-up input at reset
Pulled-up input at reset
0 at reset
)
)
(3)
(3)
, Schmitt trigger
, Schmitt trigger
6355B–ATARM–21-Jun-10
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