Z8F1233QH020SG Zilog, Z8F1233QH020SG Datasheet - Page 35
Z8F1233QH020SG
Manufacturer Part Number
Z8F1233QH020SG
Description
IC ENCORE XP MCU FLSH 12K 20QFN
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F1233QH020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4656
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F1233QH020SG
Manufacturer:
Zilog
Quantity:
670
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Table 9. Reset Sources and Resulting Reset Type
PS025111-1207
Operating Mode
NORMAL or HALT
modes
STOP mode
Power-On Reset
Each device in the Z8 Encore!
circuit. The POR circuit monitors the digital supply voltage and holds the device in the
Reset state until the digital supply voltage reaches a safe operating level. After the supply
voltage exceeds the POR voltage threshold (V
until the POR counter has timed out. If the crystal oscillator is enabled by the option bits,
the time-out is longer.
After the Z8 Encore! F0830 Series device exits the Power-on Reset state, the eZ8 CPU
fetches the reset vector. Following the Power-On Reset, the POR status bit in the reset
status (RSTSTAT) register is set to 1.
Figure 6
page 177 for the POR threshold voltage (V
Reset Source
Power-On Reset/Voltage
Brownout
Watchdog Timer time-out
when configured for reset
RESET pin assertion
On-Chip Debugger initiated reset
(OCDCTL[0] set to 1)
Power-On Reset/Voltage
Brownout
RESET pin assertion
DBG pin driven Low
displays the Power-On Reset operation. See
®
F0830 Series contains an internal Power-On Reset
Special Conditions
All reset pulses less than four system clocks in
All reset pulses less than 12 ns are ignored
Reset delay begins after supply voltage
exceeds POR level
None
width are ignored.
System, except the On-Chip Debugger is
unaffected by the reset
Reset delay begins after supply voltage
exceeds POR level
None
POR
POR
).
), the device is held in the Reset state
Electrical Characteristics
Z8 Encore!
Reset and Stop Mode Recovery
Product Specification
®
F0830 Series
on
25
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