ST72F32AK2T6 STMicroelectronics, ST72F32AK2T6 Datasheet - Page 55
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ST72F32AK2T6
Manufacturer Part Number
ST72F32AK2T6
Description
MCU 8BIT 8KB FLASH/ROM 32-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F32AK2T6.pdf
(157 pages)
Specifications of ST72F32AK2T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.8 V
Width
7 mm
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5610
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F32AK2T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK (Cont’d)
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software
reading the MCCSR register. It indicates when set
that the main oscillator has reached the selected
elapsed time (TB1:0).
0: Timeout not reached
1: Timeout reached
CAUTION: The BRES and BSET instructions
must not be used on the MCCSR register to avoid
unintentionally clearing the OIF bit.
Table 15. Main Clock Controller Register Map and Reset Values
Address
002Dh
(Hex.)
002Ch
MCCSR
Reset Value
MCCBCR
Reset Value
Register
Label
MCO
7
0
0
CP1
6
0
0
CP0
5
0
0
MCC BEEP CONTROL REGISTER (MCCBCR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:2 = Reserved, must be kept cleared.
Bit 1:0 = BC[1:0] Beep control
These 2 bits select the PF1 pin beep capability.
The beep output signal is available in ACTIVE-
HALT mode but has to be disabled to reduce the
consumption.
BC1
7
0
SMS
0
0
1
1
4
0
0
0
BC0
0
1
0
1
TB1
3
0
0
0
Beep mode with f
0
~500-Hz
~1-KHz
~2-KHz
TB0
2
0
0
0
Off
BC1
OIE
0
~50% duty cycle
1
0
0
OSC2
Beep signal
BC1
Output
ST7232A
=8MHz
BC0
OIF
55/157
0
0
0
BC0
0
1