UPSD3422E-40U6 STMicroelectronics, UPSD3422E-40U6 Datasheet - Page 103
UPSD3422E-40U6
Manufacturer Part Number
UPSD3422E-40U6
Description
MCU 8BIT 8032 64KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3422E-40U6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
80KB (80K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5577 - BOARD EVAL USB POWER SWITCH497-5518 - EVAL BOARD RFID READER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4903
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPSD3422E-40U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
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UPSD3422, UPSD3433, UPSD3434, UPSD3454
20.6.3
Note:
Table 62.
1.
Baud rate generator mode
The RCLK and/or TCLK Bits in the SFR T2CON allow the transmit and receive baud rates
on serial port UART0 to be derived from either Timer 1 or Timer 2.
illustrates Baud rate generator mode.
When TCLK = 0, Timer 1 is used as UART0’s transmit baud generator. When TCLK = 1,
Timer 2 will be the transmit baud generator. RCLK has the same effect for UART0’s receive
baud rate. With these two bits, UART0 can have different receive and transmit baud rates -
one generated by Timer 1, the other by Timer 2.
Bits RCLK1 and TCLK1 in the SFR named PCON (see
control register (SFR 87h, reset value 00h) on page
and TCLK but they apply to UART1 instead. For simplicity in the following discussions about
baud rate generation, no suffix will be used when referring to SFR registers and bits related
to UART0 or UART1, since each UART interface has identical operation. Example, TCLK or
TCLK1 will be referred to as just TCLK.
The Baud rate generator mode is similar to the Auto-reload mode, in that a roll over in TH2
causes the Timer 2 registers, TH2 and TL2, to be reloaded with the 16-bit value in registers
RCAP2H and RCAP2L, which are preset with firmware.
The baud rates in UART Modes 1 and 3 are determined by Timer 2’s overflow rate as
follows:
The timer can be configured for either “timer” or “counter” operation. In the most typical
applications, it is configured for “timer” operation (C/T2 = 0). “Timer” operation is a little
different for Timer 2 when it's being used as a baud rate generator. In this case, the baud
rate is given by the formula:
where [RCAP2H, RCAP2L] is the content of the SFRs RCAP2H and RCAP2L taken as a
16-bit unsigned integer.
A roll-over in TH2 does not set TF2, and will not generate an interrupt. Therefore, the Timer
Interrupt does not have to be disabled when Timer 2 is in the Baud rate generator mode.
If EXEN2 is set, a 1-to-0 transition on pin T2X will set the Timer 2 interrupt flag EXF2, but
will not cause a reload from RCAP2H and RCAP2L to TH2 and TL2. Thus when Timer 2 is
Baud rate
generator
Mode
↓
Off
= falling edge.
UART Mode 1,3 Baud Rate =Timer 2 Overflow Rate / 16
UART Mode 1,3 Baud Rate =f
RCLK
TCLK
Timer/counter 2 operating modes (continued)
or
1
1
x
Bits in T2CON SFR
RL2
CP/
x
x
x
TR2 EXEN2
1
1
0
0
1
x
T2X
Pin
(1)
x
x
↓
OSC
No overflow interrupt request
(TF2)
Extra Interrupt on pin T2X, sets
TF2
Timer 2 stops
/(32 x [65536 – [RCAP2H, RCAP2L]))
74) have identical functions as RCLK
Remarks
Section Table 33.: PCON: power
Standard 8032 timer/counters
Figure 29 on page 106
internal
f
–
OSC
Timer,
Input clock
/2
–
–
Counter,
external
(Pin T2,
P1.0)
103/300
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