MC68HC908QY1VDTE Freescale Semiconductor, MC68HC908QY1VDTE Datasheet - Page 112

IC MCU 1.5K FLASH 16-TSSOP

MC68HC908QY1VDTE

Manufacturer Part Number
MC68HC908QY1VDTE
Description
IC MCU 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY1VDTE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-TSSOP
Processor Series
HC08Q
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
System Integration Module (SIM)
13.6.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
13.6.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
112
Priority
Highest
Lowest
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
instruction.
Reset
SWI instruction
IRQ pin
Timer channel 0 interrupt
Timer channel 1 interrupt
Timer overflow interrupt
Keyboard interrupt
ADC conversion complete interrupt
INT1
INT2
Figure 13-10
MC68HC908QY/QT Family Data Sheet, Rev. 6
Source
CLI
LDA
PSHH
PULH
RTI
PSHH
PULH
RTI
Table 13-3. Interrupt Sources
#$FF
.
Interrupt Recognition Example
NOTE
COCO
CH0F
CH1F
KEYF
IRQF
Flag
TOF
INT1 INTERRUPT SERVICE ROUTINE
INT2 INTERRUPT SERVICE ROUTINE
IMASKK
Mask
IMASK
CH0IE
CH1IE
AIEN
TOIE
(1)
Register
Flag
IF15
IF14
INT
IF1
IF3
IF4
IF5
BACKGROUND ROUTINE
Table 13-3
$FFDE–$FFDF
$FFFC–$FFFD
$FFFE–$FFFF
$FFFA–$FFFB
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFE0–$FFE1
Address
Vector
Freescale Semiconductor
summarizes the

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