MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 118

• Manufacturer Part Number: MC68HC908JL8CSPE
• Description: IC MCU 8K FLASH 8MHZ 32-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JL8CSPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Timer Interface Module (TIM)
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
118
Setting MS0B disables the channel 1 status and control register and reverts TCH1 to general-purpose
I/O.
Reset clears the MSxB bit.
When ELSxB:ELSxA ≠ 0:0, this read/write bit selects either input capture operation or unbuffered
output compare/PWM operation.
See
When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output level of the TCHx pin. See
Table
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin.
the ELSxB and ELSxA bits.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
Table
8-3. Reset clears the MSxA bit.
8-3.
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
MSxB:MSxA
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
X0
X1
1X
1X
1X
00
00
00
01
01
01
Table 8-3. Mode, Edge, and Level Selection
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Table 8-3
Output compare
Buffered output
buffered PWM
Output preset
Input capture
compare or
NOTE
or PWM
Mode
shows how ELSxB and ELSxA work. Reset clears
Capture on falling edge only
Capture on rising edge only
Toggle output on compare
Toggle output on compare
Clear output on compare
Clear output on compare
Set output on compare
Set output on compare
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising or
Configuration
falling edge
Freescale Semiconductor