MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 182

IC MCU 8K FLASH 8MHZ 32-DIP

MC68HC908JL8CSPE

Manufacturer Part Number
MC68HC908JL8CSPE
Description
IC MCU 8K FLASH 8MHZ 32-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC68HC908JL8CSPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
26
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-SDIP (0.400", 10.16mm)
Controller Family/series
HC08
No. Of I/o's
26
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08JL
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908JL16E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Break Module (BREAK)
16.4.3 Break Status Register
The break status register contains a flag to indicate that a break caused an exit from stop or wait mode.
SBSW — SIM Break Stop/Wait
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it. The following code is an example of this.
182
;
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the
break service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
This status bit is useful in applications requiring a return to wait or stop mode after exiting from a break
interrupt. Clear SBSW by writing a logic zero to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
5
6
SBSW,BSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
$FE0D
$FE00
Bit 7
Bit 7
Bit 7
R
R
0
Figure 16-5. Break Address Register Low (BRKL)
Figure 16-6. Break Status Register (BSR)
= Reserved
R
6
6
0
6
R
5
5
0
5
;
;
; If RETURNLO is not zero,
; then just decrement low byte.
; Else deal with high byte, too.
; Point to WAIT/STOP opcode.
; Restore H register.
See if wait mode or stop mode was exited
by break.
R
4
4
0
4
1. Writing a logic zero clears SBSW.
R
3
3
0
3
R
2
2
0
2
Note
SBSW
1
1
0
1
0
(1)
Freescale Semiconductor
Bit 0
Bit 0
Bit 0
R
0

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