C8051F540-IM Silicon Laboratories Inc, C8051F540-IM Datasheet - Page 255
C8051F540-IM
Manufacturer Part Number
C8051F540-IM
Description
IC 8051 MCU 16K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F54xr
Specifications of C8051F540-IM
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F540DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1672 - BOARD PROTOTYPE W/C8051F540336-1669 - KIT DEVELOPMENT FOR C8051F540
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1670-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F540-IM
Manufacturer:
Silicon Labs
Quantity:
135
Company:
Part Number:
C8051F540-IM
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
C8051F540-IM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
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24.3.3. High-Speed Output Mode
In High-Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic 1. An
interrupt request is generated if the CCFn interrupt for that module is enabled. The CCFn bit is not auto-
matically cleared by hardware when the CPU vectors to the interrupt service routine, and must be cleared
by software. Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High-
Speed Output mode. If ECOMn is cleared, the associated pin will retain its state, and not toggle on the next
match event.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
W
P
M
Figure 24.5. PCA Software Timer Mode Diagram
1
6
n
x
O
M
E
C
n
PCA0CPMn
C
A
P
P
n
0 0
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
W
M
P
n
C
C
E
F
n
x
Enable
PCA
Timebase
Rev. 1.1
PCA0CPLn
PCA0L
16-bit Comparator
PCA0CPHn
PCA0H
Match
C8051F54x
C
F
C
R
PCA0CN
C
C
F
2
0
1
C
C
F
1
C
C
F
0
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
255
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