MC705P6ACDWE Freescale Semiconductor, MC705P6ACDWE Datasheet - Page 24

IC MCU 176 BYTES RAM 28-SOIC

MC705P6ACDWE

Manufacturer Part Number
MC705P6ACDWE
Description
IC MCU 176 BYTES RAM 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC705P6ACDWE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
4.5KB (4.5K x 8)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC705P
Core
HC05
Data Bus Width
8 bit
Data Ram Size
176 B
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Memory
2.7 Mask Option Register
The mask option register (MOR) is a pair of EPROM bytes located at $1EFF and $1F00. It controls the
programmable options on the MC68HC705P6A. See
additional information.
24
$001C
$001D
$001B
$001E
$001F
Addr.
A/D Status and Control
EPROM Programming
A/D Conversion Value
Register LSB (ATRL)
Data Register (ADC)
Erased State:
Erased State:
Register (EPROG)
Reserved for Test
Register (ADSC)
Register Name
Alternate Timer
See page 49.
See page 58.
See page 55.
See page 54.
$1EFF
$1F00
Read:
Read:
Write:
Write:
Figure 2-3. I/O and Control Register Summary (Sheet 3 of 3)
SECURE
PA7PU
Bit 7
Bit 7
0
0
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 2-4. Mask Option Register (MOR)
= Unimplemented
PA6PU
ACRL7
6
0
6
0
Bit 7
AD7
CC
R
1
0
0
0
PA5PU
SWAIT
= Unimplemented
ACRL6
ADRC
5
0
5
0
AD6
R
6
1
0
0
0
PA4PU
SPR1
ACRL5
ADON
4
0
4
0
Chapter 11 Mask Option Register (MOR)
AD5
R
5
1
0
0
0
PA3PU
SPR0
ACRL4
Unaffected by reset
3
0
3
0
AD4
R
R
4
1
0
0
0
0
PA2PU
= Reserved
LSBF
ACRL3
2
0
2
0
AD3
R
3
1
0
0
0
0
PA1PU
LEVEL
ACRL2
1
1
ELAT
0
0
CH2
AD2
R
2
1
0
0
Freescale Semiconductor
PA0PU
U = Undetermined
COP
Bit 0
Bit 0
ACRL1
0
0
AD1
CH1
R
1
0
0
0
0
for
ACRL0
EPGM
Bit 0
CH0
AD0
R
0
0
0